Soft error in FPGA-implemented asynchronous circuits

Authors

Weidong Kuang, The University of Texas Rio Grande ValleyFollow
Yu Bai

Document Type

Conference Proceeding

Publication Date

4-2011

Abstract

In this paper, we investigate the mechanism of soft error generation and propagation in asynchronous circuits which are implemented on FPGAs. The effects of the soft errors on Quasi-delay-insensitive (QDI) asynchronous circuits are analyzed. The results show that it is much easier to detect the soft error in asynchronous circuits implemented on FPGAs so that FPGAs can be reprogrammed, compared with traditional synchronous circuits.

Comments

U.S. Government work not protected by U.S. copyright

Recommended Citation

W. Kuang and Y. Bai, "Soft error in FPGA-implemented asynchronous circuits," 2011 VII Southern Conference on Programmable Logic (SPL), 2011, pp. 221-226, doi: 10.1109/SPL.2011.5782652.

Publication Title

2011 VII Southern Conference on Programmable Logic (SPL)

DOI

10.1109/SPL.2011.5782652