Modern processors usually have a deep pipeline, superscalar architecture to obtain higher performance. As pipelines are getting deeper, accurate branch prediction is critical to achieve high performance, since fetched instructions after a branch have to be flushed from inside the pipeline when the prediction is wrong. This paper studies the performance of several types of branch predictors, starting from local branch predictor and global branch predictor. Simulation results show that the global history predictor outperforms the local history predictor due to the characteristic that branches tend to be correlated. However, the global history predictor still suffers an aliasing problem that degrades performance. Four techniques are proposed to alleviate the aliasing problem. The performance is evaluated by using Simplescalar with SPEC CINT95 benchmark programs. The proposed predictors display better performance over the conventional predictors after careful configuration of each.
Tieling Xie, R. Evans and Y. Chu, "A study for branch predictors to alleviate the aliasing problem [pipelining]," Proceedings. IEEE SoutheastCon, 2005., Ft. Lauderdale, FL, USA, 2005, pp. 603-608, doi: 10.1109/SECON.2005.1423313.
Proceedings. IEEE SoutheastCon, 2005.