Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall Devices

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Conference Proceeding

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Despite many attractive advantages, Null Convention Logic (NCL) remains to be a niche largely due to its high imple- mentation costs. Using emerging spintronic devices, this paper proposes a Domain-Wall-Motion-based NCL circuit design methodology that achieves approximately 30x and 8x improvements in energy efficiency and chip layout area, respectively, over its equivalent CMOS design, while main- taining similar delay performance for a 32-bit full adder. These advantages are made possible mostly by exploiting the domain wall motion physics to natively realize the hys- teresis critically needed in NCL. More Interestingly, this de- sign choice achieves ultra-high robustness by allowing spin- tronic device parameters to vary within a predetermined range while still achieving correct operations.


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Publication Title

Proceedings of the 26th edition on Great Lakes Symposium on VLSI